This Microcredential has five key objectives:
- Understand the complete digital design flow from RTL description to physical sign-off.
- Understand RTL synthesis techniques leading to circuits optimized for speed, area, power consumption, and testability.
- Learn to physically implement an integrated circuit using Floorplanning, Place & Route, Clock Routing, and DRC tools.
- Understand the sign-off process and interaction with the factory.
- Acquire practical skills in the use of professional tools (Synopsys and Cadence) to implement digital integrated circuits.
Contents
RTL Synthesis
- Static temporal analysis. Time libraries and constraints.
- Synthesis optimizations: area, speed, and power.
- Structure insertion for testing.
Physical implementation (P&R) and sign-off.
- Floor planning.
- DRC.
- Cell placement.
- Clock tree synthesis.
- Wiring.
- Sign-off.
Competencies
- Synthesize (automatically obtain the logic-level representation) a digital circuit from its RTL description.
- Know how to apply constraints to ensure compliance with timing requirements.
- Generate cost- and power-optimized logic circuits.
- Build the layout of the circuit to be integrated using Place & Route, clock routing, and DRC tools.
- Master the final circuit closure process in the post-layout stage, as well as interaction with the factory.
- Use professional CAD tools for the synthesis and implementation of integrated digital circuits.
Learning outcomes
Acquire the above skills based on the initial objectives and the proposed content.
Training activities
- Guided self-learning activities
- Lecture class
- Practical class (classroom, lab, computer, etc.)
- Development of projects, assignments, programs, etc.
- Solving practical cases
Planning
The study planning is shown in the following table:
| Módulo/Asignatura | Créditos Teóricos | Créditos Prácticos | Créditos Totales | Tipología |
|---|---|---|---|---|
| A−50−00X − Síntesis e Implementación Física de Circuitos Digitales Integrados | 2,00 | 4,00 | 6,00 | Obligatoria |